ARIA FPGA Technician

University of Surrey • Guildford, England, United Kingdom • £31.64k / year • 1w ago

Fixed Term until 05/10/2026

The University of Surrey is a global community of ideas and people, dedicated to life-changing education and research.

We are ambitious and have a bold vision of what we want to achieve - shaping ourselves into one of the best universities in the world, which we are achieving through the talents and endeavour of every employee.

Our culture empowers people to achieve this aim and to collectively, and individually, make a real difference.

The Role

To provide FPGA and VHDL programming and technician support to the laser payload being developed under the ARIA Photonics Project in Surrey Space Centre.

ARIA Photonics aims to develop critical signal processing avionics and robust all-fibre architecture for space-based laser systems to enable a new, innovative generation of smaller, lighter, more resilient portable isotopologue and ppb sensing to deliver a step change in both performance and cost.

This relies on adapting telecoms industry COTS components and software radio FPGA/DSP techniques towards a new all-fibre space-qualified stabilised laser systems for geodesy with equivalent performance to laboratory systems. A flexible digital control system will enable automated operation in harsh environments, with full testing in simulated space environments undertaken.

Key Responsibilities

To write simulation files for the current VHDL control and filter codes to make performance analysis.
To recommend any restructuring of the ARIA Photonics firmware.
To provide updated FDIR and risk analysis updates using Xilinx critical bits methodology.
To support the hardware and software implementation of new ADC and DAC filters and configurations
To create digital test result logs that details the ARIA Photonics payload performance.
To provide general support towards the ARIA Photonics project document delivery.

N.B. The above list is not exhaustive.

About You

It is essential that candidates have:

Broad practical work experience in FPGA hardware development and VHDL simulation.

How to apply

Email Dr Chris Bridges (c.p.bridges@surrey.ac.uk) for all other enquiries.

Ideally looking to start in August 2025.

Further details: Job Description

For more information and to apply online, please download the further details and click on the 'Apply' button above.

In return we offer a generous pension, relocation assistance where appropriate , flexible working options including job share and blended home/campus working locations (dependent on work duties), access to world-class leisure facilities on campus, a range of travel schemes and supportive family friendly benefits including an excellent on-site nursery.

Click here to find out more about the benefits we offer to support you.

The University of Surrey is committed to providing an inclusive environment that offers equal opportunities for all. We place great value on diversity and are seeking to increase the diversity within our community. Therefore we particularly encourage applications from under-represented groups, such as people from Black, Asian and minority ethnic groups and people with disabilities.

£31,637 per annum

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